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| Aim of Module | To provide students with an understanding of how units within a computer work and the different methods of connecting them. |
| Credits | 7 |
| Knowledge Assumed From | PR230 Programming (Systems) OS210 Operating Systems (Internals) Or DE200 Digital Electronics and DE210 Digital Electronics (Applied) |
| Suggested Time | 70 student learning hours |
| Prescription Expiry Date | Nov 2002 |
| Topics | Highest Skill Level | Suggested Assessment Percentage | |
| 1 Introduction | C | 10 | |
| 2 Computer Systems Organisation | C | 30 | |
| 3 Micro programming | C | 30 | |
| 4 Conventional Machine | C | 30 | |
| 100 | |||
| 1 Introduction |
| C | Explain the general terms and concepts used in machine architecture and how all computers can be categorised in functional levels. | |
| > | Interpretation vs translation. | |
| > | Virtual machine concept. | |
| > | Multilevel virtual machine: | |
| -digital logic | ||
| -conventional machine | ||
| -assembly language | ||
| -micro programming | ||
| -operating system | ||
| -problem oriented languages | ||
| -hardware, software, firmware | ||
| 2 Computer Systems Organisation |
| C | Explain how the individual units within a computer system work and the different ways they can be connected to form a computer system. | |
| > | Different ways of specifying instruction operands in terms of number and addressing method. | |
| > | Single processor organisation: | |
| - | single and multiple bus structures: method and consequences | |
| - | instruction execution: I-phase, E-phase | |
| - | processor types: graphics, RISC technology | |
| > | Parallel instruction execution: | |
| - | multiple CPUs | |
| - | array processors | |
| - | pipe-lining | |
| > | Memory organisation: | |
| - | word lengths, different meanings and sizes | |
| - | READ and WRITE operations on memory | |
| - | memory management, segmentation, paging, virtual memory, cache memory, look-aside buffers - their implementations with methods and reasons | |
| - | describe the emory organisation on a range of computers eg. - on PC, explain usual and maximum memory configurations, expanded and extended memory, EMS, plug-in boards and chips used on them. | |
| - | input/output | |
| - | data and address bus sizes | |
| - | functions necessary for I/O transfer | |
| - | select or address device | |
| - | transfer data | |
| - | synchronise transfer operation - polling and interrupts | |
| - | interfaces - serial and parallel | |
| - | DMA and character based devices | |
| - | data channels: | |
| -multiplexer (byte, block) | ||
| -selector | ||
| -block multiplexer | ||
| - | describe I/O implementation on a range of computers eg. On PC, explain serial and parallel cards, disk controllers: RLL, Western Digital, SCSI, multiport terminal cards: eg. - Anvil designs for 386, micro channel | |
| - | video controllers | |
| - | distributed processing | |
| - | wide and local area networks as computer system organisation | |
| 3 Micro programming |
| C | 3.1 | Describe connection of the scratch pad to ALU, shifter, MAR, MDR and the latches that select them - the data path. |
| C | 3.2 | Micro-instructions: describe function of each line to control above components. |
| C | 3.3 | Micro-architecture of chosen processor - describe the components, their connection and function. |
| C | 3.4 | Macro-architecture of chosen processor - describe the instruction set to be micro-coded. |
| C | 3.5 | Micro-program - describe the micro-code of chosen processor. |
| 4 Conventional Machine |
| C | Describe the design constraints that manufacturers face in the design of an instruction set. | |
| > | Instruction length - short vs long. | |
| > | Memory transfer size and rates. | |
| > | Word length. | |
| > | Instruction format consideration: | |
| - | op code length, expanding op codes, instruction formats | |
| > | Instruction fetch considerations - instruction length field. | |
| > | Operand specification - register and memory. | |